PD-sep matrix results: C2/C3/C4 figures + empirical mechanism refined
Captures 5 runs from the experiment matrix (combined-ca x3 seeds, pdsep-4p4d seed1, pdsep-6p2d seed1) on traces/w600_r0.0015_st30.jsonl with cuda graphs enabled. The headline: combined-ca: TTFT p50 0.91s success 99.5% pdsep-4p4d: TTFT p50 62.8s success 52% (69x worse, half dropped) pdsep-6p2d: TTFT p50 51.1s success 68% (56x worse, third dropped) C2 (fig_c2): headline bars per config with error bars. C3 (fig_c3): per-instance KV utilization time-series. Both PD-sep splits hit the memory wall, but the side differs by P:D ratio -- 4P+4D pins the P-side, 6P+2D pins both sides (D-side back-pressures P-side). C4 (fig_c4): TTFT stacked breakdown. 99% of PD-sep TTFT is P-side prefill compute; D-side wait + first token is <=1.2s. The bottleneck is P-side prefill queueing, not D-side decode wait as the original analytical model assumed. system_analysis.md gains a Layer 5b that reconciles the analytical KV-wall model (which considered D-side only) with the empirical finding that the wall hits whichever side has fewer GPUs, and co-saturates both at extreme splits via D-side back-pressure. plot_pd_matrix.py ingests outputs/pd_matrix/* into all four figures. bench.sh gained AGENTIC_STEP_LOG_DIR hooks for future runs (set during this work but not used by the current matrix's data). Co-Authored-By: Claude Opus 4.7 <noreply@anthropic.com>
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@@ -160,6 +160,97 @@ The empirical KV occupancy on the 6P+2D run was 97 %
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(`analysis/pd_separation_analysis.md` §3.3) — the model and the
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measurement agree to within the resolution of the steady-state assumption.
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## Layer 5b: empirical refinement — the bottleneck side depends on the P:D split
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The model above predicts D-side saturation. The 6P+2D run in
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`analysis/pd_separation_analysis.md` §3.3 is consistent with it. But the
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new 4P+4D run (`outputs/pd_matrix/pdsep-4p4d_cudagraph_seed1/`, captured
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during this section's experiment matrix) tells a richer story.
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Empirical numbers (combined-ca vs both PD-sep splits, same trace, all
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cudagraph, `figures/fig_c2_pdsep_vs_combined.pdf`):
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| metric | combined-ca (N=3) | pdsep-4p4d (N=1) | pdsep-6p2d (N=1) |
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|---|---|---|---|
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| success | 99.5 % | **52 %** (444/850) | **68 %** (574/850) |
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| TTFT p50 | 0.91 s | **62.8 s** (69×) | **51.1 s** (56×) |
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| TTFT p90 | 12.7 s | **491 s** (39×) | **400 s** (31×) |
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| TPOT p90 | 0.027 s | 0.013 s (-52 %) | 0.020 s (-26 %) |
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| E2E p50 | 2.5 s | **65.1 s** (26×) | **53.4 s** (21×) |
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| wall clock | 944 s | 7558 s (8×) | 3693 s (3.9×) |
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The per-stage TTFT decomposition (`figures/fig_c4_ttft_stacked.pdf`)
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shows that for both PD-sep splits **>97 % of TTFT is P-side prefill
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compute** (65.6 s / 66.2 s in 4p4d; 43.1 s / 44.3 s in 6p2d). D-side
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wait + first token is at most 1.2 s in either config.
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The KV-utilization time-series (`figures/fig_c3_kv_timeseries.pdf`)
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tells the full story:
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- **combined-ca**: 8 GPUs oscillate 0–98 %, peaks bursty and short
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- **pdsep-4p4d**: P-instances (orange) pinned at 85–100 % the entire
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2-hour run; D-instances (red) bounce between 10 % and 50 % — only
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P side hits the wall
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- **pdsep-6p2d**: **both** sides pinned near 100 % the entire run
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(per-instance peaks 99–100 % across all 8). P-side fills because D
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back-pressures (D can't free KV slots fast enough → P can't
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hand off → P-side KV accumulates).
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This refines Layer 5: PD separation hits a memory wall on whichever
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side has fewer GPUs, and at extreme splits it co-saturates both sides
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through D-back-pressure.
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### Why P-side fills in 4P+4D
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Two effects combine on P:
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1. **Compute concentration.** Combined spreads prefill across 8 GPUs;
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4P+4D over 4. Per-P-GPU prefill load is 2× the per-Combined-GPU load.
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With chunked prefill, multiple in-flight prefills compete for the
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scheduler.
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2. **KV residency on P.** Mooncake does block-by-block transfer *after*
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the full prefill completes. Until D pulls and acknowledges every
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block, the completed-but-not-yet-transferred KV sits in P's pool —
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on top of all the partially-prefilled in-flight KV. Many concurrent
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33–132 k contexts overwhelm a single 28 GB pool.
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This is the same memory-wall mechanism Layer 5 described, but on the
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*prefill* side. The Layer 5 analytical model in
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`figures/fig_kv_memory_wall.pdf` accounted only for *decode-side* KV
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demand. The full model is:
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```
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P-side occupancy = (in_flight_prefills × KV_per_req) / (N_P × pool)
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D-side occupancy = (concurrent_decode × KV_per_req) / (N_D × pool)
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```
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Whichever side hits the wall first becomes the back-pressure source.
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4P+4D's P-side fills first because 4 GPUs are doing 8 GPUs' worth of
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prefill. 6P+2D's D-side hits the wall (4× concentration), which then
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back-pressures P (no slots to hand off into) until P also fills. In
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either case, *some* side blocks — which is why PD separation regresses
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across the P:D ratios we tested.
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### Updated falsifiable condition
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The condition for PD separation to *not* regress is now two-sided:
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```
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max(
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in_flight_prefills × KV_per_req / (N_P × pool),
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concurrent_decode × KV_per_req / (N_D × pool)
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) < 1
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```
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For chatbot workloads (KV/req ≈ 200 MB), this holds easily on either
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side. For agentic with KV/req ≈ 3.3 GB on average and 10–13 GB at the
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tail, both terms cross 1 well below the chosen N_P or N_D.
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Followups: re-render `fig_kv_memory_wall.pdf` to show both P and D
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curves once the 6P+2D run lands, with the empirical P-side and D-side
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peaks marked.
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## Layer 6: the DistServe / Splitwise assumption that silently breaks
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To formalize: the regime in which PD separation pays is bounded by both a
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