phase 15: decode attention kernel + fused silu_mul + fused add_rmsnorm
Three performance optimizations targeting decode throughput: 1. Decode Attention Kernel (csrc/attention/flash_attention.cu): - Specialized kernel for Q_len=1 (decode step) - 256 threads parallelize across KV sequence dimension - Online softmax with block-level warp-shuffle reduction - Replaces FA2 kernel which wasted 63/64 threads for decode - flash_attention() auto-dispatches when q_len==1 2. Fused SiLU×Mul (csrc/activation/activations.cu): - Single kernel: out = silu(gate) * up - Saves 1 HBM read + 1 HBM write per FFN layer (N elements) - Eliminates intermediate tensor allocation 3. Fused Add+RMSNorm (csrc/normalization/rmsnorm.cu): - Single kernel: (normed, sum) = (rmsnorm(x+residual), x+residual) - Saves 1 full HBM round-trip per attention block - Eliminates separate add + rmsnorm kernel pair Performance analysis: - At current short sequences (max 79 tokens), these optimizations provide marginal benefit because the bottleneck is cuBLAS GEMV overhead: 252 weight matrix reads × ~32MB each = 15.5 GB per decode step. Theoretical minimum at 1.79 TB/s = 8.7ms, actual ~78ms (9x gap). - The fused kernels and decode attention will show larger gains at longer sequences where attention and element-wise ops dominate. - Next optimization target: CUDA Graphs to eliminate kernel launch overhead, or custom GEMV kernels to replace cuBLAS for M=1. Co-Authored-By: Claude Opus 4.6 (1M context) <noreply@anthropic.com>
This commit is contained in:
@@ -12,6 +12,7 @@ unsafe extern "C" {
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fn launch_add_bf16(a: *const c_void, b: *const c_void, out: *mut c_void, n: i32, stream: *mut c_void);
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fn launch_mul_f32(a: *const c_void, b: *const c_void, out: *mut c_void, n: i32, stream: *mut c_void);
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fn launch_mul_bf16(a: *const c_void, b: *const c_void, out: *mut c_void, n: i32, stream: *mut c_void);
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fn launch_silu_mul_bf16(gate: *const c_void, up: *const c_void, out: *mut c_void, n: i32, stream: *mut c_void);
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}
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fn dispatch_unary(x: &Tensor, f32_fn: unsafe extern "C" fn(*const c_void, *mut c_void, i32, *mut c_void),
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@@ -67,3 +68,24 @@ pub fn scale(x: &Tensor, scale_val: f32) -> Tensor {
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pub fn add(a: &Tensor, b: &Tensor) -> Tensor { dispatch_binary(a, b, launch_add_f32, launch_add_bf16) }
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pub fn mul(a: &Tensor, b: &Tensor) -> Tensor { dispatch_binary(a, b, launch_mul_f32, launch_mul_bf16) }
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/// Fused SiLU×Mul: out = silu(gate) * up (BF16 only)
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/// Saves one HBM read + one HBM write compared to separate silu + mul.
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pub fn silu_mul(gate: &Tensor, up: &Tensor) -> Tensor {
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assert_eq!(gate.shape(), up.shape());
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assert!(gate.is_contiguous() && up.is_contiguous());
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assert!(matches!(gate.device(), Device::Cuda(_)));
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assert_eq!(gate.dtype(), DType::BF16, "silu_mul requires BF16");
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let out = Tensor::zeros(gate.shape(), gate.dtype(), gate.device());
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let n = gate.numel() as i32;
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unsafe {
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launch_silu_mul_bf16(
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gate.data_ptr() as *const c_void,
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up.data_ptr() as *const c_void,
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out.data_ptr() as *mut c_void,
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n,
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std::ptr::null_mut(),
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);
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}
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out
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}
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@@ -16,6 +16,12 @@ unsafe extern "C" {
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q_len: i32, kv_len: i32, head_dim: i32,
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scale: f32, causal: i32, stream: *mut c_void,
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);
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fn launch_decode_attention_bf16(
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q: *const c_void, k: *const c_void, v: *const c_void, o: *mut c_void,
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batch: i32, num_q_heads: i32, num_kv_heads: i32,
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kv_len: i32, head_dim: i32,
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scale: f32, causal: i32, stream: *mut c_void,
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);
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}
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fn apply_causal_mask(scores: &Tensor, offset: usize) {
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@@ -81,7 +87,52 @@ pub fn attention(q: &Tensor, k: &Tensor, v: &Tensor, causal: bool) -> Tensor {
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batched_matmul(&weights, v)
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}
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/// Decode Attention — optimized for single-token decode (q_len=1).
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///
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/// q: [batch, num_q_heads, 1, head_dim] BF16, contiguous, GPU
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/// k: [batch, num_kv_heads, kv_len, head_dim] BF16, contiguous, GPU
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/// v: [batch, num_kv_heads, kv_len, head_dim] BF16, contiguous, GPU
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///
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/// Returns: [batch, num_q_heads, 1, head_dim] BF16
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pub fn decode_attention(q: &Tensor, k: &Tensor, v: &Tensor) -> Tensor {
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assert_eq!(q.ndim(), 4);
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assert_eq!(q.shape()[2], 1, "decode_attention requires q_len == 1");
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let batch = q.shape()[0];
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let num_q_heads = q.shape()[1];
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let head_dim = q.shape()[3];
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let num_kv_heads = k.shape()[1];
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let kv_len = k.shape()[2];
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let scale = 1.0 / (head_dim as f32).sqrt();
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let output = Tensor::zeros(
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&[batch, num_q_heads, 1, head_dim],
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DType::BF16,
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q.device(),
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);
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unsafe {
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launch_decode_attention_bf16(
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q.data_ptr() as *const c_void,
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k.data_ptr() as *const c_void,
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v.data_ptr() as *const c_void,
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output.data_ptr() as *mut c_void,
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batch as i32,
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num_q_heads as i32,
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num_kv_heads as i32,
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kv_len as i32,
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head_dim as i32,
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scale,
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1, // causal (always 1 for decode)
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std::ptr::null_mut(),
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);
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}
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output
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}
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/// Flash Attention 2 — O(1) extra memory, supports GQA natively.
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/// Auto-dispatches to decode_attention when q_len == 1.
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///
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/// q: [batch, num_q_heads, q_len, head_dim] BF16, contiguous, GPU
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/// k: [batch, num_kv_heads, kv_len, head_dim] BF16, contiguous, GPU
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@@ -109,6 +160,11 @@ pub fn flash_attention(q: &Tensor, k: &Tensor, v: &Tensor, causal: bool) -> Tens
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assert!(num_q_heads % num_kv_heads == 0, "num_q_heads must be divisible by num_kv_heads");
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assert!(head_dim <= 128, "flash_attention supports head_dim up to 128");
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// Dispatch to specialized decode kernel for single-token generation
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if q_len == 1 {
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return decode_attention(q, k, v);
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}
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let scale = 1.0 / (head_dim as f32).sqrt();
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let output = Tensor::zeros(
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&[batch, num_q_heads, q_len, head_dim],
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@@ -8,13 +8,13 @@ pub mod rope;
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pub mod softmax;
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pub mod transpose;
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pub use activation::{add, gelu, mul, scale, silu};
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pub use activation::{add, gelu, mul, scale, silu, silu_mul};
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pub use transpose::{merge_heads_gpu, repeat_kv_gpu, reshape_heads_gpu, strided_to_contiguous_gpu, transpose_for_rope_gpu, transpose_from_rope_gpu};
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pub use attention::{attention, flash_attention};
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pub use attention::{attention, decode_attention, flash_attention};
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pub use embedding::embedding;
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pub use gemm::{batched_matmul, matmul, GemmBackend};
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pub use layernorm::layernorm;
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pub use rmsnorm::rmsnorm;
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pub use rmsnorm::{add_rmsnorm, rmsnorm};
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pub use rope::{rope_inplace, RopeCache};
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pub use softmax::softmax;
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@@ -6,6 +6,9 @@ unsafe extern "C" {
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rows: i32, hidden_size: i32, eps: f32, stream: *mut c_void);
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fn launch_rmsnorm_bf16(x: *const c_void, gamma: *const c_void, out: *mut c_void,
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rows: i32, hidden_size: i32, eps: f32, stream: *mut c_void);
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fn launch_add_rmsnorm_bf16(x: *const c_void, residual: *const c_void, gamma: *const c_void,
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normed_out: *mut c_void, sum_out: *mut c_void,
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rows: i32, hidden_size: i32, eps: f32, stream: *mut c_void);
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}
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pub fn rmsnorm(x: &Tensor, gamma: &Tensor, eps: f32) -> Tensor {
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@@ -34,3 +37,39 @@ pub fn rmsnorm(x: &Tensor, gamma: &Tensor, eps: f32) -> Tensor {
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}
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out
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}
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/// Fused Add + RMSNorm: computes sum = x + residual, then normed = rmsnorm(sum, gamma, eps).
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/// Returns (normed, sum). BF16 only.
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/// Saves one kernel launch and one full HBM round-trip per layer.
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pub fn add_rmsnorm(x: &Tensor, residual: &Tensor, gamma: &Tensor, eps: f32) -> (Tensor, Tensor) {
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assert!(x.ndim() >= 1);
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assert_eq!(x.shape(), residual.shape());
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assert!(x.is_contiguous() && residual.is_contiguous() && gamma.is_contiguous());
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assert!(matches!(x.device(), Device::Cuda(_)));
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assert_eq!(x.dtype(), DType::BF16, "add_rmsnorm requires BF16");
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assert_eq!(residual.dtype(), DType::BF16);
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assert_eq!(gamma.dtype(), DType::BF16);
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let hidden_size = *x.shape().last().unwrap();
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assert_eq!(gamma.shape(), &[hidden_size]);
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let rows = x.numel() / hidden_size;
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let normed_out = Tensor::zeros(x.shape(), DType::BF16, x.device());
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let sum_out = Tensor::zeros(x.shape(), DType::BF16, x.device());
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unsafe {
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launch_add_rmsnorm_bf16(
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x.data_ptr() as *const c_void,
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residual.data_ptr() as *const c_void,
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gamma.data_ptr() as *const c_void,
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normed_out.data_ptr() as *mut c_void,
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sum_out.data_ptr() as *mut c_void,
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rows as i32,
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hidden_size as i32,
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eps,
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std::ptr::null_mut(),
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);
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}
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(normed_out, sum_out)
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}
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