Add Qwen3.6 MoE inference support
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@@ -34,6 +34,51 @@
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#define SPARSE_TILE_N 8 // output columns per block (= warps per block)
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// Weights FP8 E4M3 [local_experts, N, K], activations BF16 (W8A16).
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// Decode is memory-bound (~2 FLOP/byte), so dequant-in-registers GEMV
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// loses nothing to tensor cores and skips activation quantization.
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__global__ void moe_sparse_gemv_bf16_bf16_kernel(
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const __nv_bfloat16* __restrict__ x, // [T, K] or [T*top_k, K]
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const __nv_bfloat16* __restrict__ w, // [local_experts, N, K]
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const int* __restrict__ topk_ids, // [T, top_k] global expert ids
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__nv_bfloat16* __restrict__ y, // [T, top_k, N]
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int N, int K, int top_k,
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int expert_start, int local_experts,
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int x_per_slot
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) {
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int token = blockIdx.z;
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int slot = blockIdx.y;
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int eid = topk_ids[token * top_k + slot];
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int lid = eid - expert_start;
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if (lid < 0 || lid >= local_experts) return;
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extern __shared__ float xs[];
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const __nv_bfloat16* xrow =
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x + (long long)(x_per_slot ? token * top_k + slot : token) * K;
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for (int i = threadIdx.x; i < K; i += blockDim.x) {
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xs[i] = __bfloat162float(xrow[i]);
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}
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__syncthreads();
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int n = blockIdx.x * SPARSE_TILE_N + (threadIdx.x >> 5);
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if (n >= N) return;
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int lane = threadIdx.x & 31;
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const __nv_bfloat16* wrow = w + ((long long)lid * N + n) * K;
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float acc = 0.0f;
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for (int i = lane; i < K; i += 32) {
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acc += xs[i] * __bfloat162float(wrow[i]);
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}
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#pragma unroll
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for (int o = 16; o > 0; o >>= 1) {
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acc += __shfl_down_sync(0xffffffffu, acc, o);
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}
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if (lane == 0) {
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y[((long long)token * top_k + slot) * N + n] = __float2bfloat16(acc);
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}
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}
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// Weights FP8 E4M3 [local_experts, N, K], activations BF16 (W8A16).
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// Decode is memory-bound (~2 FLOP/byte), so dequant-in-registers GEMV
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// loses nothing to tensor cores and skips activation quantization.
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@@ -194,6 +239,23 @@ __global__ void moe_weighted_sum_sparse_bf16_kernel(
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extern "C" {
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void launch_moe_sparse_gemv_bf16_bf16(
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const void* x, const void* w, const void* topk_ids, void* y,
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int num_tokens, int N, int K, int top_k,
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int expert_start, int local_experts, int x_per_slot,
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void* stream
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) {
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dim3 grid((N + SPARSE_TILE_N - 1) / SPARSE_TILE_N, top_k, num_tokens);
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int block = SPARSE_TILE_N * 32;
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size_t smem = (size_t)K * sizeof(float);
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moe_sparse_gemv_bf16_bf16_kernel<<<grid, block, smem, (cudaStream_t)stream>>>(
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(const __nv_bfloat16*)x, (const __nv_bfloat16*)w, (const int*)topk_ids,
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(__nv_bfloat16*)y,
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N, K, top_k, expert_start, local_experts, x_per_slot
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);
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CUDA_CHECK_LAST_ERROR();
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}
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void launch_moe_sparse_gemv_fp8_bf16(
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const void* x, const void* w, const void* w_scales, const void* bias,
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const void* topk_ids, void* y,
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