phase 10: GPU add/mul kernels + BF16 precision analysis
Kernel additions: - add_f32/bf16, mul_f32/bf16 CUDA kernels (element-wise, on GPU) - Refactored activation.rs with dispatch_unary/dispatch_binary helpers - Qwen3 and GPT-2 now use GPU add/mul instead of CPU round-trips GPT-2 add_bias also moved to GPU (broadcast via tile + GPU add) BF16 precision analysis (docs/benchmarks/phase10-qwen3.md): - Root cause: separate attention kernels materialize BF16 intermediates (QK^T→BF16→scale→BF16→mask→BF16→softmax→BF16 vs HF's fused FP32 path) - HF itself SDPA vs Eager also differs by ~0.125 logit - xserv vs HF: ~1-2 logit systematic offset, but same top-1 in 84% cases - Industry standard for BF16: top-5 overlap (we achieve 100%) - Fix path: Flash Attention (Phase 14) to fuse attention in FP32 Performance: TTFT 138→119ms, TBT 144→137ms (GPU ops faster than CPU) Co-Authored-By: Claude Opus 4.6 (1M context) <noreply@anthropic.com>
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@@ -250,27 +250,11 @@ fn repeat_kv(x: &Tensor, n_rep: usize) -> Tensor {
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}
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fn add_any(a: &Tensor, b: &Tensor) -> Tensor {
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assert_eq!(a.shape(), b.shape());
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let a_cpu = a.to_device(Device::Cpu);
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let b_cpu = b.to_device(Device::Cpu);
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let ad = a_cpu.as_slice::<bf16>();
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let bd = b_cpu.as_slice::<bf16>();
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let r: Vec<bf16> = ad.iter().zip(bd)
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.map(|(x, y)| bf16::from_f32(x.to_f32() + y.to_f32()))
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.collect();
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Tensor::from_slice(&r, a.shape()).to_device(a.device())
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xserv_kernels::add(a, b)
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}
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fn mul_any(a: &Tensor, b: &Tensor) -> Tensor {
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assert_eq!(a.shape(), b.shape());
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let a_cpu = a.to_device(Device::Cpu);
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let b_cpu = b.to_device(Device::Cpu);
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let ad = a_cpu.as_slice::<bf16>();
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let bd = b_cpu.as_slice::<bf16>();
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let r: Vec<bf16> = ad.iter().zip(bd)
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.map(|(x, y)| bf16::from_f32(x.to_f32() * y.to_f32()))
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.collect();
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Tensor::from_slice(&r, a.shape()).to_device(a.device())
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xserv_kernels::mul(a, b)
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}
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pub fn sample_greedy(logits: &Tensor) -> u32 {
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