bench: PP harness (xserv --pp vs llama.cpp -sm layer)

runner/servers: add --pp for both engines (xserv --pp N; llama.cpp
-sm layer over N GPUs). New drivers: pp_final.sh (sequential latency +
per-GPU VRAM + byte-exact correctness), pp_diag.sh (single x2 vs pp4 x2
determinism control), pp_quality_full.sh / pp_llama_47.sh (AIME+GSM8K
matrix, xserv on 0-3 || llama on 4-7), summarize_pp/summarize_fullq,
pp_time.py latency probe.

Co-Authored-By: Claude Opus 4.8 <noreply@anthropic.com>

tools/bench/servers.py

@@ -114,6 +114,7 @@ def xserv_launch_cmd(
     max_batch: int,
     max_seq_len: int,
     tp: int = 1,
+    pp: int = 1,
 ) -> list[str]:
     cmd = [
         bin_path,
@@ -122,7 +123,9 @@ def xserv_launch_cmd(
         "--max-batch", str(max_batch),
         "--max-seq-len", str(max_seq_len),
     ]
-    if tp > 1:
+    if pp > 1:
+        cmd += ["--pp", str(pp)]  # xserv binds stage s -> GPU s internally
+    elif tp > 1:
         cmd += ["--tp", str(tp)]  # xserv binds rank r -> GPU r internally
     return cmd
 
@@ -136,6 +139,7 @@ def llama_cpp_launch_cmd(
     ctx_per_slot: int,
     n_gpu_layers: int = 99,
     tp: int = 1,
+    pp: int = 1,
 ) -> list[str]:
     # llama.cpp DIVIDES total -c across --parallel slots: per-slot context is
     # n_ctx / n_parallel. xserv gives each sequence the full max_seq_len, so to
@@ -153,7 +157,10 @@ def llama_cpp_launch_cmd(
         # NOTE: do NOT pass --log-disable; its startup log reports per-slot
         # n_ctx, which is exactly the diagnostic that catches ctx misconfig.
     ]
-    if tp > 1:
+    if pp > 1:
+        # Pipeline / layer split across the visible GPUs (llama.cpp default).
+        cmd += ["--split-mode", "layer", "-ts", ",".join(["1"] * pp)]
+    elif tp > 1:
         # Tensor-parallel split across the visible GPUs (caller restricts the
         # set via CUDA_VISIBLE_DEVICES in launch_env). Row-split is llama.cpp's
         # tensor-parallel mode (vs the default layer/pipeline split).