Gahow Wang
4c3f914459
CUDA layer for the paged-KV + swap work: - csrc: new paged_attention.cu plus updates across attention/gemm/norm/ activation/embedding/reduce kernels and common.cuh. - xserv-kernels: new dispatch module and kernel-binding updates. - xserv-cuda: cudaMallocHost/FreeHost bindings + PinnedBuffer (host swap pool backing) and offset-aware D2H/H2D copies used to move KV blocks between the GPU pool and pinned host memory. Co-Authored-By: Claude Opus 4.7 <noreply@anthropic.com>
66 lines
1.8 KiB
Plaintext
66 lines
1.8 KiB
Plaintext
#include <cuda_bf16.h>
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#include "../common.cuh"
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// Naive GEMM: each thread computes one element of C.
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// C[i][j] = sum_k A[i][k] * B[k][j]
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// All matrices are row-major.
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__global__ void gemm_naive_bf16(
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const __nv_bfloat16* A, const __nv_bfloat16* B, __nv_bfloat16* C,
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int M, int N, int K
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) {
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int row = blockIdx.y * blockDim.y + threadIdx.y;
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int col = blockIdx.x * blockDim.x + threadIdx.x;
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if (row < M && col < N) {
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float sum = 0.0f;
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for (int k = 0; k < K; k++) {
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sum += __bfloat162float(A[row * K + k]) * __bfloat162float(B[k * N + col]);
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}
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C[row * N + col] = __float2bfloat16(sum);
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}
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}
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__global__ void gemm_naive_f32(
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const float* A, const float* B, float* C,
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int M, int N, int K
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) {
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int row = blockIdx.y * blockDim.y + threadIdx.y;
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int col = blockIdx.x * blockDim.x + threadIdx.x;
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if (row < M && col < N) {
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float sum = 0.0f;
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for (int k = 0; k < K; k++) {
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sum += A[row * K + k] * B[k * N + col];
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}
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C[row * N + col] = sum;
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}
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}
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extern "C" {
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void launch_gemm_naive_bf16(
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const void* A, const void* B, void* C,
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int M, int N, int K, void* stream
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) {
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dim3 block(16, 16);
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dim3 grid((N + block.x - 1) / block.x, (M + block.y - 1) / block.y);
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gemm_naive_bf16<<<grid, block, 0, (cudaStream_t)stream>>>(
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(const __nv_bfloat16*)A, (const __nv_bfloat16*)B, (__nv_bfloat16*)C, M, N, K
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);
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CUDA_CHECK_LAST_ERROR();
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}
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void launch_gemm_naive_f32(
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const void* A, const void* B, void* C,
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int M, int N, int K, void* stream
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) {
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dim3 block(16, 16);
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dim3 grid((N + block.x - 1) / block.x, (M + block.y - 1) / block.y);
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gemm_naive_f32<<<grid, block, 0, (cudaStream_t)stream>>>(
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(const float*)A, (const float*)B, (float*)C, M, N, K
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);
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CUDA_CHECK_LAST_ERROR();
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}
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} // extern "C"
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