Gahow Wang
4c3f914459
CUDA layer for the paged-KV + swap work: - csrc: new paged_attention.cu plus updates across attention/gemm/norm/ activation/embedding/reduce kernels and common.cuh. - xserv-kernels: new dispatch module and kernel-binding updates. - xserv-cuda: cudaMallocHost/FreeHost bindings + PinnedBuffer (host swap pool backing) and offset-aware D2H/H2D copies used to move KV blocks between the GPU pool and pinned host memory. Co-Authored-By: Claude Opus 4.7 <noreply@anthropic.com>
80 lines
3.4 KiB
Rust
80 lines
3.4 KiB
Rust
use std::ffi::c_void;
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use xserv_tensor::{DType, Device, Tensor};
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unsafe extern "C" {
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fn launch_rmsnorm_f32(x: *const c_void, gamma: *const c_void, out: *mut c_void,
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rows: i32, hidden_size: i32, eps: f32, stream: *mut c_void);
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fn launch_rmsnorm_bf16(x: *const c_void, gamma: *const c_void, out: *mut c_void,
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rows: i32, hidden_size: i32, eps: f32, stream: *mut c_void);
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fn launch_add_rmsnorm_bf16(x: *const c_void, residual: *const c_void, gamma: *const c_void,
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normed_out: *mut c_void, sum_out: *mut c_void,
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rows: i32, hidden_size: i32, eps: f32, stream: *mut c_void);
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}
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pub fn rmsnorm(x: &Tensor, gamma: &Tensor, eps: f32) -> Tensor {
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assert!(x.ndim() >= 1);
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assert!(x.is_contiguous() && gamma.is_contiguous());
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assert!(matches!(x.device(), Device::Cuda(_)));
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let hidden_size = *x.shape().last().unwrap();
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assert_eq!(gamma.shape(), &[hidden_size]);
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assert_eq!(x.dtype(), gamma.dtype());
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let rows = x.numel() / hidden_size;
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assert!(rows <= i32::MAX as usize, "too many rows for i32 kernel param");
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assert!(hidden_size <= i32::MAX as usize, "hidden_size too large for i32 kernel param");
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let out = Tensor::empty(x.shape(), x.dtype(), x.device());
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unsafe {
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match x.dtype() {
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DType::F32 => launch_rmsnorm_f32(
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x.data_ptr() as _, gamma.data_ptr() as _, out.data_ptr() as *mut c_void,
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rows as i32, hidden_size as i32, eps, std::ptr::null_mut(),
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),
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DType::BF16 => launch_rmsnorm_bf16(
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x.data_ptr() as _, gamma.data_ptr() as _, out.data_ptr() as *mut c_void,
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rows as i32, hidden_size as i32, eps, std::ptr::null_mut(),
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),
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_ => panic!("unsupported dtype for rmsnorm"),
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}
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}
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out
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}
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/// Fused Add + RMSNorm: computes sum = x + residual, then normed = rmsnorm(sum, gamma, eps).
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/// Returns (normed, sum). BF16 only.
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/// Saves one kernel launch and one full HBM round-trip per layer.
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pub fn add_rmsnorm(x: &Tensor, residual: &Tensor, gamma: &Tensor, eps: f32) -> (Tensor, Tensor) {
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assert!(x.ndim() >= 1);
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assert_eq!(x.shape(), residual.shape());
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assert!(x.is_contiguous() && residual.is_contiguous() && gamma.is_contiguous());
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assert!(matches!(x.device(), Device::Cuda(_)));
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assert_eq!(x.dtype(), DType::BF16, "add_rmsnorm requires BF16");
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assert_eq!(residual.dtype(), DType::BF16);
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assert_eq!(gamma.dtype(), DType::BF16);
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let hidden_size = *x.shape().last().unwrap();
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assert_eq!(gamma.shape(), &[hidden_size]);
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let rows = x.numel() / hidden_size;
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assert!(rows <= i32::MAX as usize, "too many rows for i32 kernel param");
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assert!(hidden_size <= i32::MAX as usize, "hidden_size too large for i32 kernel param");
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let normed_out = Tensor::empty(x.shape(), DType::BF16, x.device());
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let sum_out = Tensor::empty(x.shape(), DType::BF16, x.device());
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unsafe {
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launch_add_rmsnorm_bf16(
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x.data_ptr() as *const c_void,
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residual.data_ptr() as *const c_void,
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gamma.data_ptr() as *const c_void,
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normed_out.data_ptr() as *mut c_void,
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sum_out.data_ptr() as *mut c_void,
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rows as i32,
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hidden_size as i32,
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eps,
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std::ptr::null_mut(),
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);
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}
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(normed_out, sum_out)
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}
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