Kernel additions: - add_f32/bf16, mul_f32/bf16 CUDA kernels (element-wise, on GPU) - Refactored activation.rs with dispatch_unary/dispatch_binary helpers - Qwen3 and GPT-2 now use GPU add/mul instead of CPU round-trips GPT-2 add_bias also moved to GPU (broadcast via tile + GPU add) BF16 precision analysis (docs/benchmarks/phase10-qwen3.md): - Root cause: separate attention kernels materialize BF16 intermediates (QK^T→BF16→scale→BF16→mask→BF16→softmax→BF16 vs HF's fused FP32 path) - HF itself SDPA vs Eager also differs by ~0.125 logit - xserv vs HF: ~1-2 logit systematic offset, but same top-1 in 84% cases - Industry standard for BF16: top-5 overlap (we achieve 100%) - Fix path: Flash Attention (Phase 14) to fuse attention in FP32 Performance: TTFT 138→119ms, TBT 144→137ms (GPU ops faster than CPU) Co-Authored-By: Claude Opus 4.6 (1M context) <noreply@anthropic.com>
136 lines
5.2 KiB
Plaintext
136 lines
5.2 KiB
Plaintext
#include <cuda_bf16.h>
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#include <math.h>
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// GELU (tanh approximation):
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// gelu(x) = 0.5 * x * (1 + tanh(sqrt(2/pi) * (x + 0.044715 * x^3)))
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__device__ __forceinline__ float gelu_f(float x) {
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const float SQRT_2_OVER_PI = 0.7978845608f;
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float cube = x * x * x;
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float inner = SQRT_2_OVER_PI * (x + 0.044715f * cube);
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return 0.5f * x * (1.0f + tanhf(inner));
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}
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// SiLU (Swish): silu(x) = x * sigmoid(x) = x / (1 + exp(-x))
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__device__ __forceinline__ float silu_f(float x) {
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return x / (1.0f + expf(-x));
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}
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__global__ void gelu_f32(const float* x, float* out, int n) {
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int idx = blockIdx.x * blockDim.x + threadIdx.x;
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if (idx < n) out[idx] = gelu_f(x[idx]);
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}
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__global__ void gelu_bf16(const __nv_bfloat16* x, __nv_bfloat16* out, int n) {
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int idx = blockIdx.x * blockDim.x + threadIdx.x;
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if (idx < n) out[idx] = __float2bfloat16(gelu_f(__bfloat162float(x[idx])));
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}
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__global__ void silu_f32(const float* x, float* out, int n) {
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int idx = blockIdx.x * blockDim.x + threadIdx.x;
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if (idx < n) out[idx] = silu_f(x[idx]);
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}
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__global__ void silu_bf16(const __nv_bfloat16* x, __nv_bfloat16* out, int n) {
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int idx = blockIdx.x * blockDim.x + threadIdx.x;
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if (idx < n) out[idx] = __float2bfloat16(silu_f(__bfloat162float(x[idx])));
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}
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__global__ void scale_f32_kernel(const float* x, float* out, float scale, int n) {
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int idx = blockIdx.x * blockDim.x + threadIdx.x;
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if (idx < n) out[idx] = x[idx] * scale;
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}
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__global__ void scale_bf16_kernel(const __nv_bfloat16* x, __nv_bfloat16* out, float scale, int n) {
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int idx = blockIdx.x * blockDim.x + threadIdx.x;
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if (idx < n) out[idx] = __float2bfloat16(__bfloat162float(x[idx]) * scale);
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}
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// Element-wise add: out = a + b
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__global__ void add_f32_kernel(const float* a, const float* b, float* out, int n) {
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int idx = blockIdx.x * blockDim.x + threadIdx.x;
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if (idx < n) out[idx] = a[idx] + b[idx];
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}
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__global__ void add_bf16_kernel(const __nv_bfloat16* a, const __nv_bfloat16* b, __nv_bfloat16* out, int n) {
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int idx = blockIdx.x * blockDim.x + threadIdx.x;
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if (idx < n) out[idx] = __float2bfloat16(__bfloat162float(a[idx]) + __bfloat162float(b[idx]));
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}
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// Element-wise mul: out = a * b
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__global__ void mul_f32_kernel(const float* a, const float* b, float* out, int n) {
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int idx = blockIdx.x * blockDim.x + threadIdx.x;
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if (idx < n) out[idx] = a[idx] * b[idx];
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}
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__global__ void mul_bf16_kernel(const __nv_bfloat16* a, const __nv_bfloat16* b, __nv_bfloat16* out, int n) {
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int idx = blockIdx.x * blockDim.x + threadIdx.x;
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if (idx < n) out[idx] = __float2bfloat16(__bfloat162float(a[idx]) * __bfloat162float(b[idx]));
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}
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extern "C" {
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void launch_gelu_f32(const void* x, void* out, int n, void* stream) {
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int block = 256;
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int grid = (n + block - 1) / block;
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gelu_f32<<<grid, block, 0, (cudaStream_t)stream>>>((const float*)x, (float*)out, n);
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}
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void launch_gelu_bf16(const void* x, void* out, int n, void* stream) {
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int block = 256;
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int grid = (n + block - 1) / block;
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gelu_bf16<<<grid, block, 0, (cudaStream_t)stream>>>(
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(const __nv_bfloat16*)x, (__nv_bfloat16*)out, n);
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}
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void launch_silu_f32(const void* x, void* out, int n, void* stream) {
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int block = 256;
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int grid = (n + block - 1) / block;
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silu_f32<<<grid, block, 0, (cudaStream_t)stream>>>((const float*)x, (float*)out, n);
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}
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void launch_silu_bf16(const void* x, void* out, int n, void* stream) {
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int block = 256;
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int grid = (n + block - 1) / block;
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silu_bf16<<<grid, block, 0, (cudaStream_t)stream>>>(
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(const __nv_bfloat16*)x, (__nv_bfloat16*)out, n);
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}
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void launch_scale_f32(const void* x, void* out, float scale, int n, void* stream) {
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int block = 256;
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int grid = (n + block - 1) / block;
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scale_f32_kernel<<<grid, block, 0, (cudaStream_t)stream>>>(
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(const float*)x, (float*)out, scale, n);
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}
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void launch_scale_bf16(const void* x, void* out, float scale, int n, void* stream) {
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int block = 256;
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int grid = (n + block - 1) / block;
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scale_bf16_kernel<<<grid, block, 0, (cudaStream_t)stream>>>(
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(const __nv_bfloat16*)x, (__nv_bfloat16*)out, scale, n);
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}
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void launch_add_f32(const void* a, const void* b, void* out, int n, void* stream) {
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int block = 256;
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int grid = (n + block - 1) / block;
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add_f32_kernel<<<grid, block, 0, (cudaStream_t)stream>>>(
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(const float*)a, (const float*)b, (float*)out, n);
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}
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void launch_add_bf16(const void* a, const void* b, void* out, int n, void* stream) {
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int block = 256;
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int grid = (n + block - 1) / block;
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add_bf16_kernel<<<grid, block, 0, (cudaStream_t)stream>>>(
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(const __nv_bfloat16*)a, (const __nv_bfloat16*)b, (__nv_bfloat16*)out, n);
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}
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void launch_mul_f32(const void* a, const void* b, void* out, int n, void* stream) {
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int block = 256;
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int grid = (n + block - 1) / block;
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mul_f32_kernel<<<grid, block, 0, (cudaStream_t)stream>>>(
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(const float*)a, (const float*)b, (float*)out, n);
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}
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void launch_mul_bf16(const void* a, const void* b, void* out, int n, void* stream) {
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int block = 256;
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int grid = (n + block - 1) / block;
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mul_bf16_kernel<<<grid, block, 0, (cudaStream_t)stream>>>(
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(const __nv_bfloat16*)a, (const __nv_bfloat16*)b, (__nv_bfloat16*)out, n);
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}
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}
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