cuda: bf16 cuBLAS GemmEx (16BF in/out, fp32 accum) + cast kernels
Add the bf16 compute primitives for T12 mixed precision: - DType::BF16 (half::bf16 as TensorDType), 2 bytes. - cublasGemmEx / cublasGemmStridedBatchedEx FFI + CUDA_R_16BF / CUBLAS_COMPUTE_32F constants (values per xserv gemm.rs). - cublas::gemm_ex / gemm_ex_strided_batched: same row-major⟺col-major transpose algebra as sgemm, bf16 in/out, fp32 accumulation. - csrc/ops/cast.cu: f32<->bf16 cast + bf16 elementwise (add/mul/scale/ silu(+dx)/add_bias/sum_rows), each load->fp32->compute->store bf16. Co-Authored-By: Claude Opus 4.8 <noreply@anthropic.com>
This commit is contained in:
@@ -36,6 +36,7 @@ fn main() {
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.file("../../csrc/ops/model.cu")
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.file("../../csrc/ops/optim.cu")
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.file("../../csrc/ops/attention.cu")
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.file("../../csrc/ops/cast.cu")
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.compile("xtrain_cuda_kernels");
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}
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@@ -19,6 +19,7 @@
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use crate::ffi::{self, CublasHandle};
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use std::cell::RefCell;
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use std::ffi::c_void;
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thread_local! {
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static HANDLE: RefCell<Option<CublasHandle>> = const { RefCell::new(None) };
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@@ -159,3 +160,131 @@ pub fn sgemm_strided_batched(
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assert_eq!(status, 0, "cublasSgemmStridedBatched failed: {status}");
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});
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}
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/// bf16 row-major GEMM `C[m,n] = opA(A)·opB(B)` via `cublasGemmEx`: bf16 in/out,
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/// **fp32 accumulation** (`CUBLAS_COMPUTE_32F`) — the standard AMP matmul (Phase
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/// T12). `a`/`b`/`c` are device pointers to row-major **bf16** matrices; the
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/// row-major⟺col-major transpose algebra is identical to [`sgemm`] (we compute
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/// the col-major `Cᵀ`). `alpha`/`beta` are fp32 host scalars (compute is fp32).
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#[allow(clippy::too_many_arguments)]
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pub fn gemm_ex(
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trans_a: bool,
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trans_b: bool,
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m: usize,
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n: usize,
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k: usize,
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alpha: f32,
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a: *const c_void,
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b: *const c_void,
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beta: f32,
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c: *mut c_void,
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) {
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let lda = if trans_a { m } else { k };
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let ldb = if trans_b { k } else { n };
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let ldc = n;
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let op_a = if trans_a {
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ffi::CUBLAS_OP_T
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} else {
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ffi::CUBLAS_OP_N
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};
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let op_b = if trans_b {
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ffi::CUBLAS_OP_T
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} else {
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ffi::CUBLAS_OP_N
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};
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let bf16 = ffi::CUDA_R_16BF;
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with_handle(|handle| {
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let status = unsafe {
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ffi::cublasGemmEx(
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handle,
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op_b,
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op_a,
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n as i32,
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m as i32,
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k as i32,
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&alpha as *const f32 as *const c_void,
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b,
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bf16,
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ldb as i32,
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a,
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bf16,
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lda as i32,
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&beta as *const f32 as *const c_void,
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c,
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bf16,
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ldc as i32,
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ffi::CUBLAS_COMPUTE_32F,
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ffi::CUBLAS_GEMM_DEFAULT,
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)
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};
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assert_eq!(status, 0, "cublasGemmEx failed: {status}");
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});
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}
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/// Strided-batched bf16 GEMM (Phase T12) — the [`gemm_ex`] analogue of
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/// [`sgemm_strided_batched`] for the batched attention GEMMs. bf16 in/out, fp32
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/// accumulation; strides are in ELEMENTS.
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#[allow(clippy::too_many_arguments)]
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pub fn gemm_ex_strided_batched(
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trans_a: bool,
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trans_b: bool,
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m: usize,
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n: usize,
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k: usize,
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alpha: f32,
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a: *const c_void,
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stride_a: usize,
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b: *const c_void,
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stride_b: usize,
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beta: f32,
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c: *mut c_void,
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stride_c: usize,
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batch: usize,
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) {
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let lda = if trans_a { m } else { k };
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let ldb = if trans_b { k } else { n };
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let ldc = n;
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let op_a = if trans_a {
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ffi::CUBLAS_OP_T
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} else {
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ffi::CUBLAS_OP_N
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};
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let op_b = if trans_b {
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ffi::CUBLAS_OP_T
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} else {
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ffi::CUBLAS_OP_N
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};
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let bf16 = ffi::CUDA_R_16BF;
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with_handle(|handle| {
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let status = unsafe {
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ffi::cublasGemmStridedBatchedEx(
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handle,
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op_b,
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op_a,
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n as i32,
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m as i32,
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k as i32,
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&alpha as *const f32 as *const c_void,
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b,
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bf16,
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ldb as i32,
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stride_b as i64,
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a,
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bf16,
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lda as i32,
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stride_a as i64,
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&beta as *const f32 as *const c_void,
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c,
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bf16,
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ldc as i32,
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stride_c as i64,
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batch as i32,
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ffi::CUBLAS_COMPUTE_32F,
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ffi::CUBLAS_GEMM_DEFAULT,
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)
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};
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assert_eq!(status, 0, "cublasGemmStridedBatchedEx failed: {status}");
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});
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}
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@@ -324,3 +324,126 @@ unsafe extern "C" {
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pub const CUBLAS_OP_N: i32 = 0;
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#[cfg(not(no_cuda))]
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pub const CUBLAS_OP_T: i32 = 1;
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// --- bf16 mixed precision (Phase T12) ---
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//
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// cudaDataType / cublasComputeType enum values (same as xserv's gemm.rs). The
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// bf16 GEMM uses bf16 in/out with fp32 accumulation (CUBLAS_COMPUTE_32F).
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#[cfg(not(no_cuda))]
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pub const CUDA_R_32F: i32 = 0;
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#[cfg(not(no_cuda))]
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pub const CUDA_R_16BF: i32 = 14;
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#[cfg(not(no_cuda))]
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pub const CUBLAS_COMPUTE_32F: i32 = 68;
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/// CUBLAS_GEMM_DEFAULT — let cuBLAS pick the algorithm.
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#[cfg(not(no_cuda))]
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pub const CUBLAS_GEMM_DEFAULT: i32 = -1;
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#[cfg(not(no_cuda))]
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unsafe extern "C" {
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// General GEMM with explicit in/out + compute types (bf16 path). `alpha`/
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// `beta` are fp32 host scalars (compute type is fp32). Pointers are void* so
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// the same FFI serves bf16 / fp32.
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#[allow(clippy::too_many_arguments)]
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pub fn cublasGemmEx(
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handle: CublasHandle,
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transa: i32,
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transb: i32,
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m: i32,
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n: i32,
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k: i32,
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alpha: *const std::ffi::c_void,
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a: *const std::ffi::c_void,
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a_type: i32,
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lda: i32,
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b: *const std::ffi::c_void,
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b_type: i32,
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ldb: i32,
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beta: *const std::ffi::c_void,
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c: *mut std::ffi::c_void,
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c_type: i32,
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ldc: i32,
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compute_type: i32,
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algo: i32,
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) -> i32;
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#[allow(clippy::too_many_arguments)]
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pub fn cublasGemmStridedBatchedEx(
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handle: CublasHandle,
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transa: i32,
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transb: i32,
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m: i32,
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n: i32,
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k: i32,
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alpha: *const std::ffi::c_void,
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a: *const std::ffi::c_void,
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a_type: i32,
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lda: i32,
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stride_a: i64,
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b: *const std::ffi::c_void,
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b_type: i32,
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ldb: i32,
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stride_b: i64,
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beta: *const std::ffi::c_void,
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c: *mut std::ffi::c_void,
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c_type: i32,
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ldc: i32,
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stride_c: i64,
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batch_count: i32,
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compute_type: i32,
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algo: i32,
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) -> i32;
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}
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// bf16 cast + elementwise kernels (csrc/ops/cast.cu). Pointers are void* (bf16
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// buffers); f32 sides are typed. The activation stream flows bf16; the math
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// accumulates in fp32 inside each kernel.
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#[cfg(not(no_cuda))]
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unsafe extern "C" {
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pub fn launch_cast_f32_to_bf16(input: *const f32, out: *mut c_void, n: i32, s: CudaStream);
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pub fn launch_cast_bf16_to_f32(input: *const c_void, out: *mut f32, n: i32, s: CudaStream);
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pub fn launch_add_bf16(
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a: *const c_void,
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b: *const c_void,
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out: *mut c_void,
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n: i32,
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s: CudaStream,
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);
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pub fn launch_mul_bf16(
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a: *const c_void,
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b: *const c_void,
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out: *mut c_void,
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n: i32,
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s: CudaStream,
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);
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pub fn launch_scale_bf16(
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input: *const c_void,
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out: *mut c_void,
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alpha: f32,
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n: i32,
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s: CudaStream,
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);
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pub fn launch_silu_bf16(x: *const c_void, y: *mut c_void, n: i32, s: CudaStream);
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pub fn launch_silu_dx_bf16(
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x: *const c_void,
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dy: *const c_void,
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dx: *mut c_void,
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n: i32,
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s: CudaStream,
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);
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pub fn launch_add_bias_bf16(
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x: *const c_void,
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bias: *const c_void,
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out: *mut c_void,
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rows: i32,
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cols: i32,
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s: CudaStream,
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);
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pub fn launch_sum_rows_bf16(
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dout: *const c_void,
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dbias: *mut c_void,
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rows: i32,
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cols: i32,
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s: CudaStream,
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);
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}
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@@ -1,12 +1,16 @@
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//! Tensor data types.
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//!
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//! T2 only needs `F32`, but the enum + `TensorDType` trait are structured so
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//! half-precision types (F16/BF16) can be added later (T7 mixed precision)
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//! without touching call sites.
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//! T2 only needs `F32`; `BF16` was added in T12 for mixed-precision training
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//! (bf16 linears / activations, fp32 master weights — see
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//! `docs/11-bf16-mixed-precision.md`). The enum + `TensorDType` trait keep call
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//! sites dtype-polymorphic.
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#[derive(Debug, Clone, Copy, PartialEq, Eq, Hash)]
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pub enum DType {
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F32,
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/// bfloat16: 1 sign / 8 exponent / 7 mantissa. Same exponent range as f32
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/// (so no loss scaling needed), ~2-3 decimal digits. The T12 AMP compute type.
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BF16,
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/// 32-bit signed integers. Used for cross-entropy targets (token ids).
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I32,
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}
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@@ -15,6 +19,7 @@ impl DType {
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pub fn size_bytes(self) -> usize {
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match self {
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DType::F32 => 4,
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DType::BF16 => 2,
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DType::I32 => 4,
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}
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}
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@@ -22,6 +27,7 @@ impl DType {
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pub fn name(self) -> &'static str {
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match self {
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DType::F32 => "f32",
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DType::BF16 => "bf16",
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DType::I32 => "i32",
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}
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}
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@@ -50,6 +56,16 @@ impl TensorDType for f32 {
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}
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}
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impl TensorDType for half::bf16 {
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const DTYPE: DType = DType::BF16;
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fn to_f64(self) -> f64 {
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self.to_f64()
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}
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fn from_f64(v: f64) -> Self {
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half::bf16::from_f64(v)
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}
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}
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impl TensorDType for i32 {
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const DTYPE: DType = DType::I32;
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fn to_f64(self) -> f64 {
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