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8bd7db16e1ef4f7b49b10f4fce5a32faf3d3fd88
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3 Commits

Author SHA1 Message Date
Gahow Wang
8bd7db16e1 docs: T16 grad-accum results — evolution row + README build-journey 
dash5-verified gate numbers: accum=N bit-close to N× big batch (loss
8.5e-8 / grad 3.8e-5), accum=1 bit-identical (0.0), DDP+accum matches
single-GPU (5.7e-7), memory flat (same effective batch 64: 27.7GB big →
7.2GB accum, −74%), xserv closed loop md5-identical + token-identical.

Co-Authored-By: Claude Opus 4.8 <noreply@anthropic.com>
 2026-06-17 23:52:32 +08:00
Gahow Wang
31cc2bf745 docs: capstone README — full-stack + scaling study (v0-v8) writeup 
Co-Authored-By: Claude Opus 4.8 <noreply@anthropic.com>
 2026-06-17 16:17:26 +08:00
Gahow Wang
92acf9f413 T1: scaffold repo + Rust/CUDA build chain (vecadd smoke test) 
Stand up the xtrain project skeleton: a Cargo workspace mirroring xserv's
csrc/ + crates/ layout, with a single xtrain-cuda crate that wraps the CUDA
Runtime over hand-written extern "C" FFI. build.rs compiles csrc/test/vecadd.cu
via the cc crate targeting sm_120 (RTX 5090) and links cudart.

A gated integration test runs the vector-add kernel on the GPU and asserts the
result. When nvcc is absent (local GPU-less machine), build.rs skips CUDA
compilation and sets a `no_cuda` cfg so host-side cargo check still works.

Co-Authored-By: Claude Opus 4.8 <noreply@anthropic.com>
 2026-06-15 14:42:43 +08:00