kernels/cuda: paged-attention kernel, dispatch, pinned host memory
CUDA layer for the paged-KV + swap work: - csrc: new paged_attention.cu plus updates across attention/gemm/norm/ activation/embedding/reduce kernels and common.cuh. - xserv-kernels: new dispatch module and kernel-binding updates. - xserv-cuda: cudaMallocHost/FreeHost bindings + PinnedBuffer (host swap pool backing) and offset-aware D2H/H2D copies used to move KV blocks between the GPU pool and pinned host memory. Co-Authored-By: Claude Opus 4.7 <noreply@anthropic.com>
This commit is contained in:
@@ -1,4 +1,5 @@
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#include <cuda_bf16.h>
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#include "../common.cuh"
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// Apply causal mask: set scores[row][col] = -inf where col > row + offset.
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// offset is used for KV cache: when query starts at position `offset`,
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@@ -39,6 +40,7 @@ void launch_causal_mask_f32(void* scores, int batch, int rows, int cols,
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dim3 grid((cols + block - 1) / block, rows, batch);
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causal_mask_f32<<<grid, block, 0, (cudaStream_t)stream>>>(
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(float*)scores, rows, cols, offset);
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CUDA_CHECK_LAST_ERROR();
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}
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void launch_causal_mask_bf16(void* scores, int batch, int rows, int cols,
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@@ -47,6 +49,7 @@ void launch_causal_mask_bf16(void* scores, int batch, int rows, int cols,
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dim3 grid((cols + block - 1) / block, rows, batch);
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causal_mask_bf16<<<grid, block, 0, (cudaStream_t)stream>>>(
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(__nv_bfloat16*)scores, rows, cols, offset);
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CUDA_CHECK_LAST_ERROR();
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}
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}
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@@ -1,5 +1,6 @@
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#include <cuda_bf16.h>
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#include <float.h>
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#include "../common.cuh"
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// Flash Attention 2 forward kernel for BF16 with FP32 accumulation.
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//
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@@ -391,6 +392,7 @@ void launch_flash_attention_bf16(
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q_len, kv_len, head_dim,
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scale, causal
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);
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CUDA_CHECK_LAST_ERROR();
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}
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void launch_decode_attention_bf16(
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@@ -411,6 +413,7 @@ void launch_decode_attention_bf16(
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kv_len, head_dim,
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scale
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);
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CUDA_CHECK_LAST_ERROR();
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}
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}
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215
csrc/attention/paged_attention.cu
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215
csrc/attention/paged_attention.cu
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@@ -0,0 +1,215 @@
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#include <cuda_bf16.h>
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#include <float.h>
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#include "../common.cuh"
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// Paged decode attention kernel for BF16 with FP32 accumulation.
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//
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// Reads K/V from a paged pool indexed by a per-sequence block table.
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// One CUDA block per (sequence, q_head). Each block streams over the
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// sequence's KV positions and accumulates attention output via online
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// softmax.
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//
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// Layouts:
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// Q [batch, num_q_heads, 1, head_dim] BF16
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// K_cache [num_blocks, num_kv_heads, BLOCK_SIZE, head_dim] BF16
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// V_cache same
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// block_tables [max_seqs, max_blocks_per_seq] int32
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// — the i-th sequence in this launch reads row
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// block_tables[seq_slot[i] * stride + ...].
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// For simplicity the launch passes a packed row table
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// [batch, max_blocks_per_seq] (already gathered for the
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// active batch) so we just index by blockIdx.x_seq.
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// context_lens [batch] int32 — number of valid tokens per sequence.
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//
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// One CUDA block: 256 threads, head_dim <= 128.
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#define PAGED_BLOCK_SIZE 16
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#define PAGED_THREADS 256
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#define PAGED_HEAD_DIM_MAX 128
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__global__ void paged_decode_attention_bf16_kernel(
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const __nv_bfloat16* __restrict__ Q,
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const __nv_bfloat16* __restrict__ K_cache,
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const __nv_bfloat16* __restrict__ V_cache,
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__nv_bfloat16* __restrict__ O,
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const int* __restrict__ block_tables, // [batch, max_blocks_per_seq]
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const int* __restrict__ context_lens, // [batch]
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int num_q_heads, int num_kv_heads,
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int head_dim, int max_blocks_per_seq,
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float scale
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) {
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int seq_idx = blockIdx.y; // batch dim
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int q_head = blockIdx.x; // 0 .. num_q_heads-1
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int tid = threadIdx.x;
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int kv_len = context_lens[seq_idx];
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if (kv_len <= 0) {
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// Nothing to attend over; zero output for safety.
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if (tid < head_dim) {
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O[((long long)seq_idx * num_q_heads + q_head) * head_dim + tid] =
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__float2bfloat16(0.0f);
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}
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return;
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}
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// GQA mapping
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int heads_per_group = num_q_heads / num_kv_heads;
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int kv_head = q_head / heads_per_group;
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// Pointers
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const __nv_bfloat16* Q_ptr = Q +
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((long long)seq_idx * num_q_heads + q_head) * head_dim;
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__nv_bfloat16* O_ptr = O +
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((long long)seq_idx * num_q_heads + q_head) * head_dim;
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const int* bt = block_tables + (long long)seq_idx * max_blocks_per_seq;
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// Load Q vector into registers.
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float q_reg[PAGED_HEAD_DIM_MAX];
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for (int d = 0; d < head_dim; d++) {
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q_reg[d] = __bfloat162float(Q_ptr[d]);
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}
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// Per-thread online softmax state.
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float local_max = -INFINITY;
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float local_sum = 0.0f;
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float local_O[PAGED_HEAD_DIM_MAX];
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for (int d = 0; d < head_dim; d++) local_O[d] = 0.0f;
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int kv_stride_block = num_kv_heads * PAGED_BLOCK_SIZE * head_dim;
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int kv_stride_head = PAGED_BLOCK_SIZE * head_dim;
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// Each thread handles positions tid, tid+PAGED_THREADS, ...
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for (int pos = tid; pos < kv_len; pos += PAGED_THREADS) {
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int logical_blk = pos / PAGED_BLOCK_SIZE;
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int slot_in_blk = pos % PAGED_BLOCK_SIZE;
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int phys_blk = bt[logical_blk];
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const __nv_bfloat16* K_pos = K_cache
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+ (long long)phys_blk * kv_stride_block
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+ kv_head * kv_stride_head
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+ slot_in_blk * head_dim;
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const __nv_bfloat16* V_pos = V_cache
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+ (long long)phys_blk * kv_stride_block
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+ kv_head * kv_stride_head
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+ slot_in_blk * head_dim;
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// dot(Q, K[pos]) * scale
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float dot = 0.0f;
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for (int d = 0; d < head_dim; d++) {
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dot += q_reg[d] * __bfloat162float(K_pos[d]);
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}
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float s = dot * scale;
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float new_max = fmaxf(local_max, s);
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float correction = expf(local_max - new_max);
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float p = expf(s - new_max);
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local_sum = local_sum * correction + p;
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for (int d = 0; d < head_dim; d++) local_O[d] *= correction;
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// Accumulate weighted V.
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for (int d = 0; d < head_dim; d++) {
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local_O[d] += p * __bfloat162float(V_pos[d]);
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}
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local_max = new_max;
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}
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// ---- Block-level online softmax reduction ----
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__shared__ float smem_max[32];
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__shared__ float smem_sum[32];
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__shared__ float smem_O[PAGED_HEAD_DIM_MAX];
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int lane = tid & 31;
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int warp_id = tid >> 5;
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int num_warps = PAGED_THREADS >> 5;
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// Step 1: block-wide max
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float warp_max = local_max;
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#pragma unroll
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for (int offset = 16; offset > 0; offset >>= 1)
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warp_max = fmaxf(warp_max, __shfl_down_sync(0xffffffff, warp_max, offset));
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if (lane == 0) smem_max[warp_id] = warp_max;
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__syncthreads();
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float global_max;
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if (tid == 0) {
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global_max = smem_max[0];
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for (int i = 1; i < num_warps; i++)
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global_max = fmaxf(global_max, smem_max[i]);
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smem_max[0] = global_max;
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}
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__syncthreads();
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global_max = smem_max[0];
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// Step 2: rescale local state to global_max
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float rescale = (local_max == -INFINITY) ? 0.0f : expf(local_max - global_max);
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local_sum *= rescale;
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for (int d = 0; d < head_dim; d++) local_O[d] *= rescale;
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// Step 3: reduce sum
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float warp_sum = local_sum;
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#pragma unroll
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for (int offset = 16; offset > 0; offset >>= 1)
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warp_sum += __shfl_down_sync(0xffffffff, warp_sum, offset);
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if (lane == 0) smem_sum[warp_id] = warp_sum;
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__syncthreads();
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float global_sum;
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if (tid == 0) {
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global_sum = 0.0f;
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for (int i = 0; i < num_warps; i++) global_sum += smem_sum[i];
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smem_sum[0] = global_sum;
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}
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__syncthreads();
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global_sum = smem_sum[0];
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// Step 4: reduce O across block, dim by dim
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for (int d = tid; d < head_dim; d += PAGED_THREADS) smem_O[d] = 0.0f;
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__syncthreads();
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for (int d = 0; d < head_dim; d++) {
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float val = local_O[d];
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#pragma unroll
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for (int offset = 16; offset > 0; offset >>= 1)
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val += __shfl_down_sync(0xffffffff, val, offset);
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if (lane == 0) atomicAdd(&smem_O[d], val);
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}
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__syncthreads();
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float inv_sum = (global_sum > 0.0f) ? (1.0f / global_sum) : 0.0f;
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for (int d = tid; d < head_dim; d += PAGED_THREADS) {
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O_ptr[d] = __float2bfloat16(smem_O[d] * inv_sum);
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}
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}
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extern "C" {
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void launch_paged_decode_attention_bf16(
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const void* Q,
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const void* K_cache,
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const void* V_cache,
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void* O,
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const int* block_tables,
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const int* context_lens,
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int batch, int num_q_heads, int num_kv_heads,
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int head_dim, int max_blocks_per_seq,
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float scale, void* stream
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) {
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dim3 grid(num_q_heads, batch);
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int block = PAGED_THREADS;
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paged_decode_attention_bf16_kernel<<<grid, block, 0, (cudaStream_t)stream>>>(
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(const __nv_bfloat16*)Q,
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(const __nv_bfloat16*)K_cache,
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(const __nv_bfloat16*)V_cache,
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(__nv_bfloat16*)O,
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block_tables, context_lens,
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num_q_heads, num_kv_heads,
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head_dim, max_blocks_per_seq,
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scale
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);
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CUDA_CHECK_LAST_ERROR();
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}
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}
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