Gahow Wang b0086b5214 autodiff: bf16 mixed-precision path (fp32 master via cast op)
Tensor ops dispatch on dtype: fp32 branch unchanged (bit-identical),
bf16 branch routes matmul/attention through GemmEx and elementwise
through the bf16 kernels. Norm/softmax/RoPE/cross-entropy upcast to
fp32 around the existing fp32 kernels (standard AMP: reductions/loss
fp32, matmuls bf16). Transposes route bf16 through fp32 (pure layout).

New autodiff `cast` op is the AMP bridge: forward downcasts a fp32
master leaf to bf16 for the matmul; backward upcasts the bf16 grad
back to fp32. So the fp32 leaf accumulates an fp32 grad and AdamW /
clip / DDP all-reduce stay fp32 and completely unchanged.

Co-Authored-By: Claude Opus 4.8 <noreply@anthropic.com>
2026-06-16 14:14:48 +08:00
2026-06-15 17:14:56 +08:00

xtrain

A from-scratch Rust + CUDA LLM training engine — the sibling of xserv (the inference side). GPU-first.

The goal is to learn the full training-systems stack by hand: autograd / backward passes / optimizers (AdamW) / the training loop / distributed logic. Heavy lifting is borrowed where it makes sense (GEMM → cuBLAS after a hand-written version, multi-GPU comms → NCCL, tokenizer → reused from xserv), but the core is written from scratch. The target architecture is a tiny modern transformer (RoPE + RMSNorm + SwiGLU, ~130M params) whose forward aligns with xserv's Qwen3, so the backward passes map one-to-one onto xserv's existing forward kernels and trained weights can flow back into xserv.

Status

Bootstrapping (P0). This repo currently contains only the project skeleton and a working Rust↔CUDA build chain, verified by a trivial vector-add CUDA kernel.

Layout

xtrain/
├── Cargo.toml              # workspace
├── csrc/                   # CUDA sources (.cu)
│   └── test/vecadd.cu      # trivial element-wise vector-add (smoke test)
└── crates/
    └── xtrain-cuda/        # CUDA Runtime FFI + build.rs (nvcc → sm_120)
        ├── build.rs        # compiles csrc/*.cu via the `cc` crate, links cudart
        ├── src/            # ffi / error / device / memory
        └── tests/          # vecadd smoke test

The build mirrors xserv's approach: build.rs invokes nvcc (via the cc crate) to compile csrc/*.cu targeting sm_120 (RTX 5090) and links them into the Rust crate over hand-written extern "C" FFI.

Building & testing

CUDA compilation and execution happen on a GPU box (dash5, 8× RTX 5090, sm_120):

export PATH=/usr/local/cuda/bin:$HOME/.cargo/bin:$PATH
cargo build
cargo test -p xtrain-cuda -- --nocapture   # runs the vecadd smoke test

On a machine without nvcc/GPU, build.rs detects the missing toolchain, skips CUDA compilation, and sets a no_cuda cfg — so host-side cargo check still works (the GPU smoke test is compiled out).

Description
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Readme 3.1 MiB
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Cuda 8.7%
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